Title :
Technology mapping for storage elements based on BDD matching
Author :
Yi, Ju Hwan ; Hwang, Seung Ho
Author_Institution :
Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea
Abstract :
Most digital systems have storage elements such as flip-flops and latches of various kinds. So when we synthesize from an RT level description, we must choose proper storage elements from the cell library. In this paper, we propose an extended version of a BDD which facilitates describing the behavior of these storage elements and a new technology mapping method for storage elements based on the proposed BDD.
Keywords :
Boolean functions; circuit CAD; logic CAD; BDD matching; RT level description; RTL description; binary decision diagrams; cell library; digital systems; flip-flops; latches; storage elements; technology mapping; Binary decision diagrams; Circuit synthesis; Combinational circuits; Design methodology; Digital systems; Flip-flops; Hardware; Latches; Software libraries;
Conference_Titel :
Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on
Print_ISBN :
0-7803-3694-1
DOI :
10.1109/MWSCAS.1997.662269
