Title :
Variation of Lateral Thickness techniques in SOI lateral high voltage transistors
Author :
Guo, Yufeng ; Wang, Zhigong ; Sheu, Gene
Author_Institution :
Inst. of RF- & OE-ICs, Southeast Univ., Nanjing, China
Abstract :
A novel variation of lateral thickness (VLT) technique is proposed to bring a uniform surface electric field of SOI lateral high voltage devices. Comparing to the conventional RESURF device, the linear thickness of drift region increases the breakdown voltage by 40% while decreasing the drift resistance by 50%. Furthermore, single- or two-step drift thickness can be adopted to reduce fabrication difficulties when higher breakdown voltage and lower drift resistance are maintained.
Keywords :
silicon-on-insulator; transistors; RESURF device; SOI lateral high voltage transistors; breakdown voltage; drift resistance; lateral thickness techniques; Anodes; Breakdown voltage; Cathodes; Doping; Electric resistance; Fabrication; Impurities; Manufacturing; Silicon; Surface resistance;
Conference_Titel :
Communications, Circuits and Systems, 2009. ICCCAS 2009. International Conference on
Conference_Location :
Milpitas, CA
Print_ISBN :
978-1-4244-4886-9
Electronic_ISBN :
978-1-4244-4888-3
DOI :
10.1109/ICCCAS.2009.5250456