Title :
A graph theoretic optimal algorithm for schedule compression in time-multiplexed FPGA partitioning
Author :
Huiqun Liu ; Wong, D.F.
Author_Institution :
Dept. of Comput. Sci., Texas Univ., Austin, TX, USA
Abstract :
Presents an optimal algorithm to solve the schedule compression problem, which is an open problem proposed by S. Trimberger (1998) for time-multiplexed FPGA partitioning. Time-multiplexed FPGAs have the potential to dramatically improve logic density by time-sharing logic. Schedule compression is an important step in partitioning for time-multiplexed FPGAs and can greatly influence the quality of the partitioning solution. We exactly solve the schedule compression problem by converting it to a constrained min-max path problem. We further extend our algorithm to minimize the communication cost during schedule compression. Experiments show that our optimal algorithm outperforms the existing heuristics and runs very efficiently.
Keywords :
field programmable gate arrays; graph theory; logic CAD; logic partitioning; minimisation; scheduling; time division multiplexing; algorithm performance; communication cost minimization; constrained min-max path problem; efficiency; graph-theoretic optimal algorithm; heuristics; logic density; schedule compression; solution quality; time-multiplexed FPGA partitioning; time-sharing logic; Costs; Field programmable gate arrays; Integrated circuit interconnections; Logic circuits; Logic devices; Partitioning algorithms; Processor scheduling; Reconfigurable logic; Scheduling algorithm; Time sharing computer systems;
Conference_Titel :
Computer-Aided Design, 1999. Digest of Technical Papers. 1999 IEEE/ACM International Conference on
Conference_Location :
San Jose, CA, USA
Print_ISBN :
0-7803-5832-5
DOI :
10.1109/ICCAD.1999.810683