SD-based computation sharing programmable FIR filter for software radio

A programmable FIR digital filter based on canonical-signed-digit (CSD) computation sharing multiplier is presented in this paper. The proposed CSD-based computation sharing multiplier can not only relax the critical path but also reduce the hardware cost compared to the binary computation sharing multiplier. It can reduce the cost by 44% of the binary computation sharing FIR filter with 112% clock speed. Moreover, the cost and speed of the programmable FIR digital filter are also simulated and analyzed in terms of the precomputation alphabet bitwidth, the multiplier resolution, and the number of filter tap. The results show that the optimal cost and speed can be more easily obtained at the same time in the CSD-based computation sharing programmable FIR filter than in the binary approach.