DocumentCode
3388057
Title
Spin-Hall effect MRAM based cache memory: A feasibility study
Author
Jongyeon Kim ; Tuohy, Bill ; Cong Ma ; Won Ho Choi ; Ahmed, Ibrahim ; Lilja, David ; Kim, Chris H.
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Minnesota, Minneapolis, MN, USA
fYear
2015
fDate
21-24 June 2015
Firstpage
117
Lastpage
118
Abstract
One of the key objectives of STT-MRAM research has been on minimizing switching current while maintaining the required nonvolatility. To address this challenge, non-traditional MRAMs based on novel switching mechanisms have been proposed. In particular, spin-Hall effect (SHE) which utilizes large spin currents generated in the direction transverse to the charge current have been recently drawing attention [1]. Despite early promises such as lower switching current by means of efficient spin generation (i.e. Ispin/Icharge>100%) and longer device lifetime owing to the decoupled read and write paths, there is still a lack of a comprehensive study for benchmarking SHE-MRAM against other memory technologies. In this work, we explore the trade-off points across different levels of design abstraction (i.e. device, circuit, and architecture) to evaluate the feasibility of SHE-MRAM for large on-die cache memory.
Keywords
MRAM devices; cache storage; STT-MRAM; device lifetime; on-die cache memory; spin-Hall effect; spin-hall effect; switching current; Delays; FinFETs; Integrated circuit modeling; Random access memory; Sensors; Tunneling magnetoresistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Device Research Conference (DRC), 2015 73rd Annual
Conference_Location
Columbus, OH
Print_ISBN
978-1-4673-8134-5
Type
conf
DOI
10.1109/DRC.2015.7175583
Filename
7175583
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