Title :
State-dependent changeable scan architecture against scan-based side channel attacks
Author :
Nara, Ryuta ; Atobe, Hiroshi ; Shi, Youhua ; Togawa, Nozomu ; Yanagisawa, Masao ; Ohtsuki, Tatsuo
Author_Institution :
Grad. Sch. of Fundamental Sci. & Eng., Waseda Univ., Tokyo, Japan
fDate :
May 30 2010-June 2 2010
Abstract :
Scan test is a powerful and popular test technique because it can control and observe the internal states of the circuit under test. However, scan path would be used to discover the internals of crypto hardware, which presents a significant security risk of information leakage. An interesting design-for-test technique by inserting inverters into the internal scan path to complicate the scan structure has been recently presented. Unfortunately, it still carries the potential of being attacked through statistical analysis of the information scanned out from chips. Therefore, in this paper we propose secure scan architecture, called dynamic variable secure scan, against scan-based side channel attack. The modified scan flip-flops are state-dependent, which could cause the output of each State-dependent Scan FF to be inverted or not so as to make it more difficult to discover the internal scan architecture.
Keywords :
cryptography; design for testability; flip-flops; integrated circuit design; integrated circuit testing; crypto hardware; design-for-test technique; dynamic variable secure scan; flip flops; information leakage; inverters; scan based side channel attacks; secure scan architecture; state dependent changeable scan architecture; Circuit testing; Cryptography; Electronic equipment testing; Flexible printed circuits; Information security; Information technology; Large scale integration; Permission; Power engineering and energy; System testing;
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
DOI :
10.1109/ISCAS.2010.5537859