DocumentCode
3388529
Title
An MSB-first 1-of-N single-track asynchronous Add-Compare-Select unit for Viterbi decoders
Author
Cheng, Sheng-Yao ; Tang, Chin-Khai ; Lu, Yi-Chang
Author_Institution
Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear
2009
fDate
23-25 July 2009
Firstpage
361
Lastpage
364
Abstract
In this paper, a new Add-Compare-Select unit for Viterbi decoder is presented. By implementing carry-save addition and most-significant-bit-first (MSB-First) comparison with 1-of-N asynchronous single track template, the computation speed can vary with different input data patterns, and thus performance improves considerably. A comparison between different circuit styles is also provided, which shows the performance of our design is potentially better than other designs.
Keywords
Viterbi decoding; codecs; 1-of-N single-track asynchronous add-compare-select unit; MSB-first; Viterbi decoders; carry-save addition; most-significant-bit-first; Asynchronous circuits; Decoding; Delay; Equations; Feedback loop; MOSFETs; Signal design; Timing; Viterbi algorithm; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Communications, Circuits and Systems, 2009. ICCCAS 2009. International Conference on
Conference_Location
Milpitas, CA
Print_ISBN
978-1-4244-4886-9
Electronic_ISBN
978-1-4244-4888-3
Type
conf
DOI
10.1109/ICCCAS.2009.5250497
Filename
5250497
Link To Document