Impact of atomic-scale structural design on ultra-short channel (3 nm) MOSFETs

Author

Migita, S. ; Morita, Yusuke ; Masahara, M. ; Ota, Hiroyuki

Author_Institution

Collaborative Res. Team Green Nanoelectron. Center, Nat. Inst. of Adv. Ind. Sci. & Technol., Tsukuba, Japan

fYear

2013

fDate

2-4 Jan. 2013

Firstpage

132

Lastpage

135

Abstract

Electrical performances of ultra-short channel MOSFETs were investigated on SOI substrates. The channel length was scaled to 3 nm using the anisotropic wet etching technique. A difficulty of junction technology was solved by fabrication of Junctionless-FET, which consists of uniform high concentration dopants through the body of device. Superior Junctionless-FET performance was confirmed when the channel thickness and gate dielectric film thickness were scaled close to 1 nm. Experimental and simulation studies suggest that variation of performance originates from atomic-scale fluctuation in device structures.

Keywords

MOSFET; dielectric thin films; etching; semiconductor doping; semiconductor junctions; silicon-on-insulator; SOI substrate; anisotropic wet etching; atomic-scale fluctuation; atomic-scale structural design; channel length; channel thickness; device structure; electrical performance; fabrication; gate dielectric film thickness; high concentration dopant; junction technology; junctionless-FET performance; size 3 nm; ultra-short channel MOSFET; Etching; Junctions; Logic gates; MOSFETs; Performance evaluation; Silicon; Junctionless-FET; MOSFET; Short Channel; V-groove; variation;

fLanguage

English

Publisher

ieee

Conference_Titel

Nanoelectronics Conference (INEC), 2013 IEEE 5th International

Conference_Location

Singapore

ISSN

2159-3523

Print_ISBN

978-1-4673-4840-9

Electronic_ISBN

2159-3523

Type

conf

DOI

10.1109/INEC.2013.6465976

Filename

6465976