A simplified method for testing the IBM pipeline partial-scan microprocessor

This paper describes a simple test generation method for a high-performance, pipelined partial-scan microprocessor using an automatic test generation tool which was optimized for combinational logic in generating manufacturing test data. Without this method the test generation tool would have had great difficulty in generating the test data needed to achieve the required high fault coverage. User-specified clocking sequences are also allowed for design flexibility. A description of this method is provided and the experimental results are discussed