Title :
IDDQ testing of input/output resources of SRAM-based FPGAs
Author :
Zhao, Lan ; Walker, D.M.H. ; Lombardi, Fabrizio
Author_Institution :
Lucent Technol., AT&T Bell Labs., Allentown, PA, USA
Abstract :
This paper presents a quiescent current-based (IDDQ) approach for testing input/output resources in SRAR-based FPGAs. Input/output resources include input/output blocks (IOBs) and the I/O interconnect. Test generation and application strategies are proposed by taking into account the limited controllability of the I/O resources. Configuration of these resources requires that the test stimuli must be provided by internal (logic and routing) resources. A detailed presentation for testing the I/O resources of the Xilinx XC4000 family is given
Keywords :
field programmable gate arrays; integrated circuit interconnections; integrated circuit testing; logic testing; I/O interconnect; IDDQ testing; SRAM-based FPGAs; Xilinx XC4000 family; input/output blocks; input/output resources; quiescent current-based approach; test application strategy; test generation strategy; test stimuli; Computer science; Controllability; Fault detection; Field programmable gate arrays; Logic testing; Observability; Packaging; Routing; Switches; Wiring;
Conference_Titel :
Test Symposium, 1999. (ATS '99) Proceedings. Eighth Asian
Conference_Location :
Shanghai
Print_ISBN :
0-7695-0315-2
DOI :
10.1109/ATS.1999.810778
