A 24nW, 0.65-V, 74-dB SNDR, 83-dB DR, class-AB current-mode sample and hold circuit

An ultra low-power, high linearity, wide swing, current sample-and-hold circuit is presented. The proposed circuit employs negative feedback, provides very low switching error and allows for class-AB operation. Sub-threshold CMOS devices are employed to realize all circuit building blocks which leads to ultra low power consumption and large dynamic range. Operating from a 0.65V supply, simulation results using TSMC 0.13μm CMOS model parameters confirm that the proposed circuit consumes 24nW static power and for 20kS/s sampling rate, a dynamic range and a signal to noise plus distortion ratio larger than 70dB are achieved.