• DocumentCode
    3390569
  • Title

    Effect of substrate negative bias on GIDL current in LDD nMOSFET´s

  • Author

    Chen Haifeng ; Du Huimin ; Guo Lixin

  • Author_Institution
    Sch. of Electron. Eng., Xi ´an Univ. of Posts & Telecommun., Xi´an, China
  • fYear
    2011
  • fDate
    19-22 Aug. 2011
  • Firstpage
    396
  • Lastpage
    398
  • Abstract
    The effect of substrate negative bias VB on the gate-induced drain leakage (GIDL) current is studied. It is found that the negative VB leads GIDL current curve shifts upwards. The shift of GIDL current ΔID/ID increases with increasing |VB|. The GIDL current at VG=-0.2V (in the low field region) increases with increasing |VB| more largely than that at VG=-1.2V (in the high field region).This is because that the negative VB results in the additional GIDL tunneling current in the lateral direction and it has the different effects on the low field region and high field region. It is also found that ΔID/ID at VD=0.8V is larger than that at VD=0.4V under VG=-1.2V and is smaller than that at VD=0.4V under VG= 0.2V. This ascribes the different roles of the GIDL vertical tunneling current and the GIDL lateral current induced by negative VB on the whole GIDL current.
  • Keywords
    MOSFET; leakage currents; tunnelling; GIDL current; LDD nMOSFET; gate induced drain leakage current; high field region; lateral current; low field region; substrate negative bias; vertical tunneling current; voltage -0.2 V; voltage -1.2 V; CMOS integrated circuits; Logic gates; MOSFET circuits; Silicon; Substrates; Tunneling; GIDL; band to band; gate to drain; tunneling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Mechatronic Science, Electric Engineering and Computer (MEC), 2011 International Conference on
  • Conference_Location
    Jilin
  • Print_ISBN
    978-1-61284-719-1
  • Type

    conf

  • DOI
    10.1109/MEC.2011.6025484
  • Filename
    6025484