Reconfigurable Architectures for Low Complexity Software Radio Channelizers using Hybrid Filter Banks

The flexibility of a software-defined radio (SDR) depends on its capability to operate in multi-standard wireless communication environments. The most computationally intensive part of the digital front end of an SDR receiver is the channelizer, which extracts multiple narrowband signals from a wideband input signal. The compatibility of the channnelizer with different communications standard is guaranteed by its reconfigurability. Low power and high-speed are the two other desirable characteristics of a channelizer. This paper presents a combinational architecture based on discrete Fourier transform filter bank and quadrature mirror filter bank trees for realizing a reconfigurable low complexity high-speed channelizer. Our hybrid channelizer has an additional complexity of 38% over the quadrature mirror filter bank, but the delay of the former is reduced by 94% when compared to the latter. Thus the proposed channelizer architecture offers a better trade-off between the complexity and delay