Title :
Reducing the overkills and retests in wafer testing process
Author :
Horng, S.C. ; Lin, S.-Y. ; Cheng, M.H. ; Yang, F.Y. ; Liu, C.H. ; Lee, W.Y. ; Tsai, C.H.
Author_Institution :
Dept. of Elec. & Contr. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
fDate :
31 March-1 April 2003
Abstract :
Reducing overkills is one of the main objectives in the wafer testing process, however the major mean to prevent overkills is retest. In this paper, we formulate the problem of reducing overkills and retests as a stochastic optimization problem to determine optimal threshold values concerning the number of good dies and the number of bins in a lot and wafer to decide whether to go for a retest after a regular wafer probing. The considered stochastic optimization problem is an NP hard problem. We propose an Ordinal Optimization theory based two-level method to solve the problem for good enough threshold values to achieve lesser overkills and retests within a reasonable computational time. Applying to a case based on the true mean of bins of a real semiconductor product, the threshold values we obtained are the best among 1000 sets of randomly generated threshold values in the sense of lesser overkills under a tolerable retest rate.
Keywords :
computational complexity; convergence; genetic algorithms; integrated circuit testing; neural nets; optimisation; production testing; stochastic processes; NP hard problem; ordinal optimization; overkills reduction; retest reduction; semiconductor manufacturing; stochastic optimization; two-level method; wafer probing; wafer testing process; Assembly; Contacts; Costs; Manufacturing processes; Noise measurement; Optimization methods; Packaging machines; Stochastic processes; Testing; Throughput;
Conference_Titel :
Advanced Semiconductor Manufacturing Conference and Workshop, 2003 IEEEI/SEMI
Print_ISBN :
0-7803-7681-1
DOI :
10.1109/ASMC.2003.1194508