DocumentCode
3391055
Title
A clock synchronization system with IEEE 1588–2008 adapters over existing Gigabit Ethernet equipment
Author
Han, Jiho ; Chi, Hankyu ; Jeong, Deog-Kyoon
Author_Institution
Semicond. Div., Samsung Electron., Yongin, South Korea
fYear
2010
fDate
May 30 2010-June 2 2010
Firstpage
193
Lastpage
196
Abstract
This paper presents an IEEE 1588-2008 adapter that provides existing Gigabit Ethernet equipment with the functionalities required to clock synchronization on the order of sub-microsecond. To compensate the time error caused by the queuing delays in the Gigabit Ethernet equipment, the adapter measures the residence time and runs the peer delay mechanism for the equipment. Major functional blocks including the clock synchronization cores, Media Access Controls (MACs), and frame buffers have been integrated into a 21 mm2 silicon chip in 0.18 μm CMOS process. Experimental results show that the end devices can be synchronized within ±20 ns by simply attaching the proposed IEEE 1588-2008 adapters to the ordinary switches that connects the end devices.
Keywords
CMOS logic circuits; IEEE standards; delays; local area networks; peer-to-peer computing; synchronisation; CMOS process; IEEE 1588-2008 adapters; clock synchronization system; frame buffers; gigabit ethernet equipment; media access control; peer delay mechanism; queuing delays; residence time; silicon chip; size 0.18 mum; CMOS process; Clocks; Delay effects; Ethernet networks; Joining processes; Media Access Protocol; Semiconductor device measurement; Silicon; Synchronization; Time measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location
Paris
Print_ISBN
978-1-4244-5308-5
Electronic_ISBN
978-1-4244-5309-2
Type
conf
DOI
10.1109/ISCAS.2010.5537988
Filename
5537988
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