DocumentCode
3391070
Title
Arithmetic for a high-speed adaptive learning network element
Author
Kobayashi, Hideaki ; Bonnell, Ronald D.
Author_Institution
Department of Electrical and Computer Engineering, University of South Carolina, Columbia, 29208, USA
fYear
1983
fDate
20-22 June 1983
Firstpage
164
Lastpage
168
Abstract
This paper presents a novel arithmetic scheme for a high-speed adaptive learning network (ALN) element. An ALN is a self-organizing scheme for implementing the Kolmogorov-Gabor (K-G) polynomial which maps an input vector X into an output scalar Y. In the first layer of an ALN there are n(n-l) / 2 elements. In the next layer the number of elements needed depends upon the number of outputs that are propagated from the first layer. In this paper only the design of a single element is considered. An array of memories (RAMs) and a parallel adder are used to perform multinomial arithmetic for the element. The memory array contains subfunction values which are calculated by an external host computer and downloaded to the memory array. All the memories operate on the input variables concurrently via a common address bus. The subfunction values from the memory array are then summed by a parallel adder to obtain the output of the element. A complete ALN implemented with the proposed ALN elements has advantages in operation speed and less hardware.
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic (ARITH), 1983 IEEE 6th Symposium on
Conference_Location
Aarhus, Denmark
Print_ISBN
0-8186-0034-9
Type
conf
DOI
10.1109/ARITH.1983.6158085
Filename
6158085
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