Title :
Low bandwidth decoder framework for H.264/AVC scalable extension
Author :
Chuang, Tzu-Der ; Tsung, Pei-Kuei ; Lin, Pin-Chih ; Chang, Lo-Mei ; Ma, Tsung-Chuan ; Chen, Yi-Hau ; Chen, Liang-Gee
Author_Institution :
DSP/IC Design Lab., Nat. Taiwan Univ., Taipei, Taiwan
fDate :
May 30 2010-June 2 2010
Abstract :
In the process of scalable video coding (SVC) decoding, large external memory bandwidth is required for SVC inter-layer prediction. In this paper, a low bandwidth decoder framework is proposed for SVC. Two main decoding schemes are developed to reduce the external memory bandwidth. Macroblock-level on-the-fly padding and on-line upsampling is proposed for SVC spatial scalability decoding. This scheme reduces 36% of decoding bandwidth and 34% of processing cycles. For SVC quality scalability, a layer-interleaving decoding scheme is proposed to eliminate all inter-layer prediction bandwidth which is 41-51% of decoding bandwidth. The corresponding hardware architectures of these two decoding schemes are also provided. This low bandwidth framework can save 33-52% of DRAM access power for SVC decoding.
Keywords :
DRAM chips; decoding; video coding; DRAM access power; H.264/AVC scalable extension; SVC inter-layer prediction; SVC quality scalability; SVC spatial scalability decoding; decoding bandwidth; hardware architectures; interlayer prediction bandwidth; large external memory bandwidth; layer-interleaving decoding; low bandwidth decoder framework; macroblock-level on-the-fly padding; online upsampling; scalable video coding decoding; Automatic voltage control; Bandwidth; Decoding; Hardware; Random access memory; Scalability; Spatial resolution; Static VAr compensators; Streaming media; Video coding;
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
DOI :
10.1109/ISCAS.2010.5538022