Title :
Efficient simulation model for DAC dynamic properties
Author :
De Wit, Pieter ; Gielen, Georges
Author_Institution :
Dept. Elektrotechniek, Katholieke Univ. Leuven, Heverlee, Belgium
fDate :
May 30 2010-June 2 2010
Abstract :
This paper presents a simulation model for fast and efficient prediction of the dynamic properties of high-resolution current-steering Digital-to-Analog converters. Current source mismatch, limited output impedance of the current sources and timing errors are taken into account in the simulation model. No assumptions about distributions are required for these parameters. Experimental results show simulation time reductions up to 80 times for a 10 bit segmented DAC.
Keywords :
digital-analogue conversion; timing; current source mismatch; current-steering digital-to-analog converters; simulation model; timing errors; word length 10 bit; Content addressable storage; Digital-analog conversion; Frequency; Harmonic distortion; Impedance; Linearity; Pins; Predictive models; Switches; Timing;
Conference_Titel :
Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on
Conference_Location :
Paris
Print_ISBN :
978-1-4244-5308-5
Electronic_ISBN :
978-1-4244-5309-2
DOI :
10.1109/ISCAS.2010.5538040
