• DocumentCode
    3392566
  • Title

    Design and performance of special purpose hardware for Time Warp

  • Author

    Fujimoto, Richard M. ; Tsai, Jya-Jang ; Gopalakrishnan, Ganesh

  • Author_Institution
    Dept. of Comput. Sci., Utah Univ., Salt Lake City, UT, USA
  • fYear
    1988
  • fDate
    30 May-2 Jun 1988
  • Firstpage
    401
  • Lastpage
    408
  • Abstract
    A special-purpose simulation engine based on the Time Warp mechanism is proposed to attack large-scale discrete-event simulation problems. A key component of this engine is the rollback chip, a hardware component that efficiently implements state saving and rollback functions in Time Warp. The algorithms implemented by the rollback chip are described, as well as mechanisms that allow efficient implementation. Results of simulation studies are presented that show that the rollback chip can virtually eliminate the state-saving overhead that plagues current software implementations of Time Wrap
  • Keywords
    digital integrated circuits; digital simulation; parallel architectures; parallel machines; special purpose computers; Time Warp mechanism; large-scale discrete-event simulation; rollback chip; rollback functions; special purpose hardware; special-purpose simulation engine; state-saving overhead; Circuit simulation; Clocks; Computational modeling; Computer simulation; Discrete event simulation; Engines; Hardware; Large-scale systems; Military computing; Synchronization; Time warp simulation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Architecture, 1988. Conference Proceedings. 15th Annual International Symposium on
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    0-8186-0861-7
  • Type

    conf

  • DOI
    10.1109/ISCA.1988.5251
  • Filename
    5251