• DocumentCode
    3392621
  • Title

    Real-time implementation of discrete wavelet transform on FPGA

  • Author

    Bahoura, Mohammed ; Ezzaidi, Hassan

  • Author_Institution
    Dept. of Eng., Univ. of Quebec at Rimouski, Rimouski, QC, Canada
  • fYear
    2010
  • fDate
    24-28 Oct. 2010
  • Firstpage
    191
  • Lastpage
    194
  • Abstract
    This paper presents a real-time architecture for forward/inverse wavelet transforms that take into account the group delays of the used filters. The main idea is based on the equalization of the filter path delays. The perfect reconstruction of this architecture was evaluated for various data widths. This architecture was implemented on FPGA using XUP Virtex-II Pro development board.
  • Keywords
    discrete wavelet transforms; field programmable gate arrays; signal processing; FPGA; discrete wavelet transform; forward/inverse wavelet transforms; real-time architecture; real-time implementation; Computer architecture; Delay; Discrete wavelet transforms; Field programmable gate arrays; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing (ICSP), 2010 IEEE 10th International Conference on
  • Conference_Location
    Beijing
  • Print_ISBN
    978-1-4244-5897-4
  • Type

    conf

  • DOI
    10.1109/ICOSP.2010.5655177
  • Filename
    5655177