Title :
Automatic test pattern generation for sequential circuits using genetic algorithms
Author :
Rajesh, V. ; Jain, Ajai
Author_Institution :
Dept. of Comput. Sci. & Eng., Indian Inst. of Technol., Kanpur, India
Abstract :
This paper discusses a new objective function to generate test patterns for sequential circuits using genetic algorithms. This approach is based on the importance of assigning a value (0 or 1) to a line with respect to faults in consideration. This is simulation based and can be used for any circuit that can be simulated logically
Keywords :
automatic testing; genetic algorithms; logic testing; sequential circuits; automatic test pattern generation; genetic algorithm; logic simulation; objective function; sequential circuit; Automatic test pattern generation; Circuit faults; Circuit simulation; Circuit testing; Computer science; Flip-flops; Genetic algorithms; Observability; Sequential circuits; Test pattern generators;
Conference_Titel :
VLSI Design, 1998. Proceedings., 1998 Eleventh International Conference on
Conference_Location :
Chennai
Print_ISBN :
0-8186-8224-8
DOI :
10.1109/ICVD.1998.646616
