Title :
INALSYS: a layout automation system based on analog layout constraints
Author :
Kim, Youngsoo ; Cho, Hyunsang ; Yoon, Kwangsub
Author_Institution :
Dept. of Electron. Eng., Inha Univ., Inchon, South Korea
Abstract :
An analog layout system that can handle analog constraints is presented in this paper. In order to process the analog layout constraints, parameterizable module library and the effective floorplanning model that encapsulates well-merging is proposed. Also, global routing algorithm is modified by adopting divide-by-triangle method. This layout system has been tested on several benchmark circuits and displayed comparable results to the conventional layout system in terms of layout quality, expandability and execution time.
Keywords :
SPICE; analogue integrated circuits; circuit layout CAD; integrated circuit layout; network routing; INALSYS; analog layout constraints; benchmark circuits; divide-by-triangle method; effective floorplanning model; execution time; expandability; global routing algorithm; layout automation system; layout quality; parameterizable module library; well-merging; Automation; Benchmark testing; Circuit testing; Constitution; Cost function; Libraries; Routing; SPICE; Simulated annealing; System testing;
Conference_Titel :
Circuits and Systems, 1997. Proceedings of the 40th Midwest Symposium on
Print_ISBN :
0-7803-3694-1
DOI :
10.1109/MWSCAS.1997.662297
