A phase interpolation direct digital synthesizer with an adaptive integrator

Author

Yamagishi, Akihiro ; Nosaka, Hideyuki ; Muraguchi, Masahiro ; Tsukahara, Tsuneo

Author_Institution

NTT Telecommun. Energy Labs., Kanagawa, Japan

fYear

1999

fDate

1999

Firstpage

289

Lastpage

292

Abstract

A phase interpolation direct digital synthesizer (DDS) with an adaptive integrator is described. Unlike a conventional DDS, it does not use ROM and a D/A converter. Therefore less power is dissipated and the maximum speed is increased. The delay time for phase interpolation is generated by the adaptive integrator, which is composed of a capacitance switch array and a current switch array, and by a comparator with constant threshold voltage. The DDS was fabricated on 0.5-μm CMOS process technology. The spurious level is lower than -50 dBc and the power dissipation is 130 mW at a clock frequency of 40 MHz and output frequency of about 19 MHz

Keywords

CMOS digital integrated circuits; adaptive systems; comparators (circuits); direct digital synthesis; integrating circuits; interpolation; 0.5 micron; 130 mW; 19 MHz; 40 MHz; CMOS process technology; adaptive integrator; capacitance switch array; clock frequency; comparator; constant threshold voltage; current switch array; delay time; output frequency; phase interpolation direct digital synthesizer; power dissipation; spurious level; Adaptive arrays; Capacitance; Delay effects; Frequency; Interpolation; Phased arrays; Read only memory; Switches; Synthesizers; Threshold voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio and Wireless Conference, 1999. RAWCON 99. 1999 IEEE

Conference_Location

Denver, CO

Print_ISBN

0-7803-5454-0

Type

conf

DOI

10.1109/RAWCON.1999.810987

Filename

810987