DocumentCode
3393605
Title
Application of a bitmap analysis system to the forefront of DRAM devices development
Author
Hamada, Takehiko ; Sugimoto, Masaaki
Author_Institution
Evaluation Technol. Dept., NEC Corp., Kawasaki, Japan
fYear
1997
fDate
10-12 Sep 1997
Firstpage
222
Lastpage
227
Abstract
A bitmap analysis system with a shape classification has been developed for use in manufacturing of forefront DRAM devices. This system shortens the time needed to improve the processing conditions according to the results of failure analysis. This system is a part of a total yield enhancement system have already been put to practical use in mass production
Keywords
DRAM chips; failure analysis; integrated circuit yield; DRAM device manufacture; bitmap analysis; failure analysis; mass production; shape classification; yield enhancement; Circuits; Failure analysis; Feedback; Inspection; Laboratories; Manufacturing; Mass production; National electric code; Random access memory; Shape;
fLanguage
English
Publisher
ieee
Conference_Titel
Advanced Semiconductor Manufacturing Conference and Workshop, 1997. IEEE/SEMI
Conference_Location
Cambridge, MA
ISSN
1078-8743
Print_ISBN
0-7803-4050-7
Type
conf
DOI
10.1109/ASMC.1997.630739
Filename
630739
Link To Document