Title :
Comparative assessment of adaptive body-bias SOI pass-transistor logic
Author :
Cho, Geun Rae ; Chen, Tom
Author_Institution :
Dept. of Electr. & Comput. Eng., Colorado State Univ., Fort Collins, CO, USA
Abstract :
We present a silicon-on-insulator (SOI) pass-transistor logic (PTL) gate with an active body bias control circuit and compare the proposed PTL gate with other types of PTL gates with different body bias circuits in two different 0.13 μm SOI CMOS technologies. The experimental results show that the proposed SOI PTL gate using the body bias controlled technique is superior in terms of performance and power consumption than other DTMOS PTL gates.
Keywords :
CMOS logic circuits; logic gates; silicon-on-insulator; 0.13 micron; CMOS technologies; PTL; active body bias control circuit; adaptive body bias SOI; pass transistor logic; power consumption; silicon on insulator; CMOS logic circuits; CMOS technology; Diodes; Energy consumption; MOS devices; MOSFETs; Signal restoration; Silicon on insulator technology; Threshold voltage; Voltage control;
Conference_Titel :
Quality Electronic Design, 2003. Proceedings. Fourth International Symposium on
Print_ISBN :
0-7695-1881-8
DOI :
10.1109/ISQED.2003.1194709
