Title :
The challenges of nitride spacer processing for a 0.35 μm CMOS technology
Author :
Goss, Michael ; Thornburg, Russell
Author_Institution :
Digital Equipment Corp., Hudson, MA, USA
Abstract :
The nitride spacer process is a complex process involving interactions of the isolation process, the spacer etch, and the oxide stopping layer. A high selectivity spacer etch with a small isotropic component and no plasma damage is a necessity. A composite oxide etch stop layer has shown performance benefits and yield improvement
Keywords :
CMOS integrated circuits; integrated circuit technology; integrated circuit yield; isolation technology; sputter etching; 0.35 micron; CMOS technology; composite oxide stopping layer; etch selectivity; isolation; nitride spacer processing; plasma damage; yield; CMOS process; CMOS technology; Etching; Hafnium; Plasma applications; Plasma chemistry; Silicides; Silicon; Space technology; Surfaces;
Conference_Titel :
Advanced Semiconductor Manufacturing Conference and Workshop, 1997. IEEE/SEMI
Conference_Location :
Cambridge, MA
Print_ISBN :
0-7803-4050-7
DOI :
10.1109/ASMC.1997.630740
