Impact of PCM resistance-drift in neuromorphic systems and drift-mitigation strategy

Neuromorphic architectures that exploit emerging resistive memory devices as synapses are currently receiving a lot of interest. Phase Change Memory (PCM), in particular, is a strong candidate for such architectures. However, it suffers from a resistance-drift effect in the amorphous phase (high-resistance). In this work, we investigate the impact of resistance-drift in `Learning-´ and `Read-´ mode operation of large-scale hybrid neuromorphic architectures that use bio-inspired `STDP-type´ learning rules. We show that our `2- PCM Synapse´ approach is inherently tolerant to resistance-drift. We also present a new architecture (`Binary-PCM Synapse´) and programming strategy based on partial-reset states of PCM devices, which strongly minimizes the impact of resistance-drift. To benchmark the two programming approaches and architectures, we perform system-level simulations on a complex visual pattern extraction application. A power consumption analysis for the two approaches is finally presented. It highlights the ultra low-power potential of PCM-based neuromorphic computing.