• DocumentCode
    3394616
  • Title

    Reactive ion etch of silicon nitride spacer with high selectivity to oxide

  • Author

    Regis, J.M. ; Joshi, A.M. ; Lill, T. ; Yu, M.

  • Author_Institution
    Appl. Mater. Inc., Santa Clara, CA, USA
  • fYear
    1997
  • fDate
    10-12 Sep 1997
  • Firstpage
    252
  • Lastpage
    256
  • Abstract
    A highly uniform and selective nitride spacer etch process for use in advanced sub-0.35 μm devices has been developed in the Dielectric Etch M×P+ MERIE chamber. One application involves etching the nitride film down to the gate oxide with minimal oxide loss. The nitride spacer process is also used to etch the nitride and oxide while stopping on the silicon. This process was developed for both 150 mm and 200 mm M×P+ chambers. Obtaining a good uniformity and high selectivities while maintaining a vertical profile is essential to a production worthy process. A CHF3/Ar based main etch process provides a controllable nitride etch rate (800-1700 Å/min) with good uniformity (~4%, max-min/2*ave) while providing a proper profile and maintaining the spacer width. This main etch process gives a high selectivity to silicon. A second, CH3F/O2 based process step is used for overetch past the endpoint to stop on oxide with minimal oxide loss (<50 Å)
  • Keywords
    silicon compounds; sputter etching; 0.35 micron; Dielectric Etch MxP+ MERIE chamber; Si3N4; etch rate; gate oxide; overetch; reactive ion etching; selectivity; silicon; silicon nitride spacer; uniformity; Argon; Cathodes; Dielectric devices; Dielectric materials; Etching; Plasma chemistry; Production; Semiconductor films; Silicon; Sulfur hexafluoride;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Semiconductor Manufacturing Conference and Workshop, 1997. IEEE/SEMI
  • Conference_Location
    Cambridge, MA
  • ISSN
    1078-8743
  • Print_ISBN
    0-7803-4050-7
  • Type

    conf

  • DOI
    10.1109/ASMC.1997.630744
  • Filename
    630744