A high-level approach to modeling nonlinear analog architectures

An automatic analog behavioral modeling system is described; the system operates hierarchically and first attempts to match library behavioral models to the transistor-level simulation response of the target circuit. If sufficient accuracy cannot be obtained with these standard models then bespoke template synthesis is carried out. A feature is a blend of polynomial approximation and table-based spline fitting dependent upon specified accuracy constraints. The operation of the system is illustrated with the implementation of the modeling of a bi-directional associative memory.