Title :
An improved LDMOS transistor model that accurately predicts capacitance for all bias conditions
Author :
Frere, S.F. ; Moens, P. ; Desoete, B. ; Wojciechowski, D. ; Walton, A.J.
Author_Institution :
AMI Semicond. Belgium BVBA, Oudenaarde, Belgium
Abstract :
This paper proposes an improved SPICE macro-model for the LDMOS device which performs significantly better than existing models in both DC and AC regimes. It has been implemented using standard elements and Verilog-A modules and as a consequence is simulator independent.
Keywords :
MIS devices; SPICE; capacitance; equivalent circuits; hardware description languages; semiconductor device models; AC regime; DC regime; LDMOS transistor model; SPICE macro-model; Verilog-A modules; bias conditions; capacitance; simulator independent model; standard elements; Ambient intelligence; Capacitance; Power system dynamics; Power system modeling; Power system simulation; Predictive models; SPICE; Sliding mode control; Switches; Voltage;
Conference_Titel :
Microelectronic Test Structures, 2005. ICMTS 2005. Proceedings of the 2005 International Conference on
Print_ISBN :
0-7803-8855-0
DOI :
10.1109/ICMTS.2005.1452226
