A dual-slope signaling scheme to suppress electromagnetic interference (EMI) with sustaining eye margin

Author

Yoon, Changwook ; Baek, Seungyong ; Lee, HyungRok ; Jeong, Youchul ; Park, Jongbae ; Park, Hyunjeong ; Sung, Baegin ; Kim, Joungho

Author_Institution

Teralab, KAIST, Daejeon

fYear

2008

fDate

27-29 Oct. 2008

Firstpage

143

Lastpage

146

Abstract

This paper introduces dual-slope signaling scheme to suppress EMI but sustain eye margin. The on-chip output driver is designed to generate high-speed and dual-slope signal using TSMC 0.18 CMOS process library. A 2.25 Gbps dual-slope signal suppresses EMI about maximum -18 dB but has no effect to eye-diagram and jitter at receiver after 1 m transmission line. We have verified an effect from a dual-slope signal in time-domain and frequency domain.

Keywords

CMOS integrated circuits; data communication; electromagnetic interference; interference suppression; EMI; TSMC CMOS process library; bit rate 2.25 Gbit/s; dual-slope signaling scheme; electromagnetic interference suspression; eye margin; eye-diagram; frequency domain; jitter; on-chip output driver; serial data communication; time-domain; CMOS process; Electromagnetic interference; Frequency domain analysis; Jitter; Libraries; Signal design; Signal generators; Signal processing; Time domain analysis; Transmission lines;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Performance of Electronic Packaging, 2008 IEEE-EPEP

Conference_Location

San Jose, CA

Print_ISBN

978-1-4244-2873-1

Type

conf

DOI

10.1109/EPEP.2008.4675898

Filename

4675898