An adaptive on-chip ESR controller scheme in power distribution network for simultaneous switching noise reduction

Author

Shim, Jongjoo ; Shin, Minchul ; Kim, Hyungsoo ; Kim, Yongju ; Park, Kunwoo ; Cho, Jeonghyeon ; Kim, Joungho

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., Terahertz Interconnection & Package Lab., Seoul

fYear

2008

fDate

27-29 Oct. 2008

Firstpage

169

Lastpage

172

Abstract

In this paper, we propose an adaptive on-chip equivalent series resistor (ESR) controller scheme to reduce on-chip simultaneous switching noise (SSN). The on-chip controllable ESR is adaptively changed to reduce the on-chip SSN by using the proposed scheme. Reduction of on-chip resonance and on-chip SSN is well proved through simulated results and measurements of the fabricated test chip in a 65 nm HYNIX CMOS process.

Keywords

CMOS integrated circuits; integrated circuit testing; resistors; HYNIX CMOS process; adaptive on-chip ESR controller scheme; fabricated test chip; on-chip equivalent series resistor controller scheme; on-chip resonance; power distribution network; simultaneous switching noise reduction; size 65 nm; Adaptive control; CMOS process; Network-on-a-chip; Noise reduction; Paramagnetic resonance; Power systems; Programmable control; Resistors; Semiconductor device measurement; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Performance of Electronic Packaging, 2008 IEEE-EPEP

Conference_Location

San Jose, CA

Print_ISBN

978-1-4244-2873-1

Type

conf

DOI

10.1109/EPEP.2008.4675905

Filename

4675905