DocumentCode
3396570
Title
Calibration of gain and time mismatches for time-interleaved ADCs based on digital filter bank
Author
Wen-Jun Shi ; Bo Yan
Author_Institution
Sch. of Commun. & Inf. Eng., Univ. of Electron. Sci. & Technol. of China, Chengdu, China
fYear
2011
fDate
19-22 Aug. 2011
Firstpage
1836
Lastpage
1839
Abstract
As we known, time-interleaved analog-to-digital converters (TIADC) is effective on increasing the system sampling rate. But the gain, offset and time mismatches among the sub-ADCs introduce undesirable noise into the system and degrade the overall performance seriously. This paper describes a post calibration method with digital filter banks to remove the gain and time mismatch errors. These digital filters, whose coefficients are according to weighted least square (WLS) criteria, are carried out with poly-phase structure. Simulation results show that this method can significantly improve the spurious free dynamic range (SFDR) and signal to noise ratio (SNR) of TIADC system.
Keywords
analogue-digital conversion; calibration; digital filters; least squares approximations; digital filter bank; gain mismatch; poly-phase structure; post calibration method; signal-to-noise ratio; spurious free dynamic range; system sampling rate; time mismatch errors; time-interleaved analog-digital conveters; weighted least square; Calibration; Educational institutions; Equations; Filter banks; Finite impulse response filter; Mathematical model; digital filter bank; polyphase structure; time interleaved analog to digital converter; time skew mismatch;
fLanguage
English
Publisher
ieee
Conference_Titel
Mechatronic Science, Electric Engineering and Computer (MEC), 2011 International Conference on
Conference_Location
Jilin
Print_ISBN
978-1-61284-719-1
Type
conf
DOI
10.1109/MEC.2011.6025841
Filename
6025841
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