DocumentCode
3396801
Title
Proximity interconnect technology utilizing transmission line coupling for Stacked VLSI chips
Author
Iguchi, Daisuke ; Akiyama, Yutaka ; Ito, Tsuneo ; Otsuka, Kanji
Author_Institution
Fuji Xerox Co., Ltd., Ebina
fYear
2008
fDate
27-29 Oct. 2008
Firstpage
291
Lastpage
294
Abstract
In this paper, we introduce a very high bandwidth proximity communication technique for Stacked LSIs. This technology is based on transmission line coupling between two differential pairs in the metal layers of each chip and can be implemented without modifying conventional chip fabrication process. We have demonstrated its feasibility using a single chip in which coupled two differential pairs of transmission lines are fabricated on different metal layers.
Keywords
VLSI; integrated circuit interconnections; integrated circuit testing; transmission lines; VLSI chips; differential pairs; proximity communication; proximity interconnect technology; transmission line coupling; Bandwidth; CMOS technology; Couplings; Crosstalk; Phase measurement; Pulse measurements; Semiconductor device measurement; Testing; Transmission lines; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 2008 IEEE-EPEP
Conference_Location
San Jose, CA
Print_ISBN
978-1-4244-2873-1
Type
conf
DOI
10.1109/EPEP.2008.4675937
Filename
4675937
Link To Document