Title :
Impedance design for multi-layered vias
Author :
Gu, Xiaoxiong ; Ruehli, Albert E. ; Ritter, Mark B.
Author_Institution :
T.J. Watson Res. Center, IBM, Yorktown Heights, NY
Abstract :
This paper presents a methodology based on a semi-analytical scattering model to pre-design the characteristic impedance of multi-layered through hole vias by choosing appropriate via geometrical parameters, dielectric property, and the placement of ground vias. A linear model as a function of design parameters above is further applied to analyze the statistical variation of impedance for different tolerance specification.
Keywords :
electric impedance; printed circuit design; statistical analysis; tolerance analysis; dielectric property; ground vias; hole vias; impedance design; multilayered vias; semianalytical scattering model; statistical variation; tolerance specification; Capacitance; Electromagnetic scattering; Frequency dependence; Impedance; Inductance; Packaging; Propagation losses; Scattering parameters; Solid modeling; Transmission line matrix methods;
Conference_Titel :
Electrical Performance of Electronic Packaging, 2008 IEEE-EPEP
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4244-2873-1
DOI :
10.1109/EPEP.2008.4675944
