Title :
On the implementation of shifters, multipliers, and dividers in VLSI floating point units
Author :
Peng, Victor ; Samudrala, Sridhar ; Gavrielov, Moshe
Author_Institution :
Digital Equipment Corporation, 75 Reed Road, Hudson, MA01749, USA
Abstract :
Several options for the implementation of combinatorial shifters, multipliers, and dividers for a VLSI floating point unit are presented and compared. The comparisons are made in the context of a single chip implementation in light of the constraints imposed by currently available MOS technology.
Keywords :
Arrays; Logic gates; Periodic structures; Very large scale integration; Wires;
Conference_Titel :
Computer Arithmetic (ARITH), 1987 IEEE 8th Symposium on
Conference_Location :
Como, Italy
Print_ISBN :
0-8186-0774-2
DOI :
10.1109/ARITH.1987.6158711
