• DocumentCode
    3398739
  • Title

    An optimization algorithm for timing-error estimation in time-interleaved ADCs

  • Author

    Jun-shan Wang ; Su-Juan Liu ; Pei-Pei Qi

  • Author_Institution
    Coll. of Electron. Inf. & Control Eng., Beijing Univ. of Technol., Beijing, China
  • fYear
    2012
  • fDate
    Oct. 29 2012-Nov. 1 2012
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    One of the biggest challenges in time interleaved ADCs are its extreme sensitivity to timing-error. For estimation of timing-error, the tricky thing is identification model parameters and computational complexity. A new optimization algorithm aimed at reducing computational complexity of timing-error estimation is proposed in this paper. The proposed algorithm employs the mean square algorithm to estimate the timing-error. The curve fitting algorithm is used to acquire the optimal sampling points and the best length of iterations. Simulation results show that the sampling points and the length of iterations are reduced by 40% and 75% respectively.
  • Keywords
    analogue-digital conversion; computational complexity; curve fitting; mean square error methods; optimisation; computational complexity; curve fitting algorithm; extreme sensitivity; mean square algorithm; optimal sampling points; optimization algorithm; time-interleaved ADC; timing-error estimation; Computational complexity; Computational modeling; Curve fitting; Estimation; Heuristic algorithms; Optimization; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
  • Conference_Location
    Xi´an
  • Print_ISBN
    978-1-4673-2474-8
  • Type

    conf

  • DOI
    10.1109/ICSICT.2012.6466705
  • Filename
    6466705