DocumentCode
3398848
Title
A novel triple RESURF LDMOS with partial N+ buried layer
Author
Fan Xiang ; Zhuo Wang ; Heng-Juan Wen ; Xin Zhou ; Ming Qiao ; Bo Zhang
Author_Institution
State Key Lab. of Electron. Thin Films & Integrated Devices, Univ. of Electron. Sci. & Technol. of China, Chengdu, China
fYear
2012
fDate
Oct. 29 2012-Nov. 1 2012
Firstpage
1
Lastpage
3
Abstract
Lateral Double Diffusion MOSFET is widely used due to its excellent properties. However, the contradictory between on-resistance and breakdown voltage (BV) is proved to be the technical bottleneck of optimizing power devices. On one hand, technologies such as REduce SURface Filed (RESURF), Field Plate and Variation of Lateral Doping are applied to enhance the breakdown characteristics of power devices. On the other hand, due to the limits of silicon material, to reach a higher breakdown voltage, the on-resistance must be set higher. The proposed structure, comparing with conventional structure, exhibits a higher breakdown voltage property while keeping the on-resistance invariant.
Keywords
MOS integrated circuits; power MOSFET; BV; breakdown voltage; field plate; higher breakdown voltage property; lateral doping variation; lateral double diffusion MOSFET; on-resistance invariant; partial N+ buried layer; power devices; reduce surface filed; silicon material; technical bottleneck; triple RESURF LDMOS; Electric fields; Electrodes; Epitaxial layers; Performance evaluation; Power MOSFET; Substrates;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
Conference_Location
Xi´an
Print_ISBN
978-1-4673-2474-8
Type
conf
DOI
10.1109/ICSICT.2012.6466712
Filename
6466712
Link To Document