A novel method for accurate measurement and decoupling of SRAM standby leakage

Author

Qing Dong ; Yanan Ma ; Hao Chen ; Hui Li ; Yu Jiang ; Ningxi Liu ; Wenxiang Jian ; Xiaoyong Xue ; Lele Chen ; Jianping Wang ; Jeonggi Kim ; Shaofeng Yu ; Jingang Wu ; Yinyin Lin

Author_Institution

ASIC & Syst. State Key Lab., Fudan Univ., Shanghai, China

fYear

2012

fDate

Oct. 29 2012-Nov. 1 2012

Firstpage

1

Lastpage

3

Abstract

A novel method for SRAM cell standby leakage measurement is presented, which enables accurate testing and decoupling of sub-threshold leakage (I_sub), gate leakage (I_gate) and junction leakage (I_junc) in each SRAM cell transistor. Moreover, the array based technique can not only precisely measure small current but also compensate the impact from random variations. The front-end SRAM array layout is kept original to preserve actual physical environment. The method is verified in SMIC 65nm technology. The data of I_sub, I_gate and I_junc of pull-down (PD), pull-up (PU) and pass-gate (PG) transistor are collected for process optimization to reduce standby power.

Keywords

SRAM chips; circuit optimisation; integrated circuit layout; leakage currents; transistor circuits; SMIC technology; SRAM cell standby leakage measurement; SRAM cell transistor; accurate measurement; accurate testing; actual physical environment; decoupling; front-end SRAM array layout; gate leakage; junction leakage; pass-gate transistor; process optimization; pull-down transistor; pull-up transistor; random variations; size 65 nm; sub-threshold leakage; Arrays; Layout; Logic gates; SRAM cells; Semiconductor device measurement; Transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on

Conference_Location

Xi´an

Print_ISBN

978-1-4673-2474-8

Type

conf

DOI

10.1109/ICSICT.2012.6466714

Filename

6466714