Title :
Modeling of split capacitor based dstatcom & voltage balancing scheme for load compensation
Author :
Tondare, R.P. ; Gawande, S.P. ; Ramteke, M.R.
Author_Institution :
Dept. of Electr. Eng., Yeshwantrao Chavan Coll. of Eng., Nagpur, India
Abstract :
In this paper Distribution static compensator (DSTATCOM) is realized with split capacitor configuration using state space modeling. This inverter topology is able to compensate the zero sequence components as well as achieve the harmonic compensation, power factor correction & load balancing. The significant problem faced by this topology is capacitor voltage unbalance. To overcome this drawback two quadrant chopper control scheme is used. The compensator reference currents are generated using instantaneous symmetrical component theory while the hysteresis pulse width modulation (PWM) is used to control inverter switching. The derived model has been analyzed by simulation studies through MATLAB.
Keywords :
PWM invertors; capacitors; load regulation; state-space methods; static VAr compensators; DSTATCOM; PWM; compensator reference current; distribution static compensator; harmonic compensation; hysteresis pulse width modulation; instantaneous symmetrical component theory; inverter switching control; inverter topology; load balancing; load compensation; power factor correction; quadrant chopper control scheme; split capacitor configuration; state space modeling; voltage balancing scheme; zero sequence component compensation; Capacitors; Choppers (circuits); Equations; Inverters; Mathematical model; Topology; Voltage control; Capacitor voltage balancing; Chopper control; DSTATCOM; Voltage source inverter;
Conference_Titel :
Emerging Trends in Communication, Control, Signal Processing & Computing Applications (C2SPCA), 2013 International Conference on
Conference_Location :
Bangalore
Print_ISBN :
978-1-4799-1082-3
DOI :
10.1109/C2SPCA.2013.6749354
