• DocumentCode
    3398970
  • Title

    Evaluating Benchmark Subsetting Approaches

  • Author

    Yi, Joshua J. ; Sendag, Resit ; Eeckhout, Lieven ; Joshi, Ajay ; Lilja, David J. ; John, Lizy K.

  • Author_Institution
    Networking & Comput. Syst. Group, Freescale Semicond., Inc., Austin, TX
  • fYear
    2006
  • fDate
    25-27 Oct. 2006
  • Firstpage
    93
  • Lastpage
    104
  • Abstract
    To reduce the simulation time to a tractable amount or due to compilation (or other related) problems, computer architects often simulate only a subset of the benchmarks in a benchmark suite. However, if the architect chooses a subset of benchmarks that is not representative, the subsequent simulation results will, at best, be misleading or, at worst, yield incorrect conclusions. To address this problem, computer architects have recently proposed several statistically-based approaches to subset a benchmark suite. While some of these approaches are well-grounded statistically, what has not yet been thoroughly evaluated is the: 1) absolute accuracy; 2) relative accuracy across a range of processor and memory subsystem enhancements; and 3) representativeness and coverage of each approach for a range of subset sizes. Specifically, this paper evaluates statistically-based subsetting approaches based on principal components analysis (PCA) and the Plackett and Burman (P&B) design, in addition to prevailing approaches such as integer vs. floating-point, core vs. memory-bound, by language, and at random. Our results show that the two statistically-based approaches, PCA and P&B, have the best absolute and relative accuracy for CPI and energy-delay product (EDP), produce subsets that are the most representative, and choose benchmark and input set pairs that are most well-distributed across the benchmark space. To achieve a 5% absolute CPI and EDP error, across a wide range of configurations, PCA and P&B typically need about 17 benchmark and input set pairs, while the other five approaches often choose more than 30 benchmark and input set pairs
  • Keywords
    benchmark testing; computer architecture; performance evaluation; principal component analysis; set theory; Plackett and Burman design; benchmark suite subsetting evaluation; energy-delay product; memory subsystem enhancement; principal components analysis; processor absolute accuracy; processor relative accuracy; statistically-based subsetting approach; Application software; Computational modeling; Computer architecture; Computer networks; Computer simulation; Information systems; Microarchitecture; Principal component analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Workload Characterization, 2006 IEEE International Symposium on
  • Conference_Location
    San Jose, CA
  • Print_ISBN
    1-4244-0508-4
  • Electronic_ISBN
    1-4244-0509-2
  • Type

    conf

  • DOI
    10.1109/IISWC.2006.302733
  • Filename
    4086137