DocumentCode :
3398988
Title :
High performance 0.2 /spl mu/m CMOS with 25 /spl Aring/ gate oxide grown on nitrogen implanted Si substrates
Author :
Liu, C.T. ; Lloyd, E.J. ; Yi Ma ; Du, M. ; Opila, R.L. ; Hillenius, S.F.
Author_Institution :
Lucent Technol., AT&T Bell Labs., Murray Hill, NJ, USA
fYear :
1996
fDate :
8-11 Dec. 1996
Firstpage :
499
Lastpage :
502
Abstract :
The difficulties in device engineering increase rapidly as advanced circuits take up more portions in the design of low-power IC products. These new circuit designs enforce strict requirements on the deep-submicron FETs, particularly in the areas of: (1) properties of thin gate oxides, (2) control of short channel effects, (3) doping profiles to reduce subthreshold slope and back-gate bias coefficient, and (4) device aging. Previously, we have shown that thin gate oxides grown on nitrogen implanted (N/sup +/ I/I) Si substrates can prevent boron (B) penetration for p-MOSFETs. Here, we have (1) built high performance 0.2 /spl mu/m CMOS with 25 /spl Aring/ gate oxide, (2) used multi-angle ellipsometry, high-resolution TEM, SIMS, XPS, and tunneling current to study the oxide properties, (3) identified N distribution in the oxide, (4) observed quantum effects in the oxide tunneling current, (5) compared hole and electron mobilities with and without N/sup +/ I/I, (6) demonstrated a range of V/sub th/, I/sub on/, and I/sub off/, (7) achieved 72 mV/dec subthreshold slope (SS), 60 mV Vth-shift under 2.5 V back-gate bias, and below 10 mV DIBL V/sub G/-shift, (8) studied junction leakage with and without N/sup +/ I/I, (9) oxide breakdown voltage, and (10) device lifetimes for both n- and p-MOSFETs.
Keywords :
CMOS integrated circuits; MOSFET; X-ray photoelectron spectra; boron; dielectric thin films; doping profiles; electric breakdown; electron mobility; ellipsometry; hole mobility; ion implantation; leakage currents; nitrogen; secondary ion mass spectra; semiconductor-insulator boundaries; silicon; substrates; transmission electron microscopy; tunnelling; 0.2 micron; 2.5 V; 25 A; B penetration prevention; N implanted Si substrates; NMOSFET; PMOSFET; SIMS; Si:B,N; SiO/sub 2/-Si:B,N; XPS; back-gate bias coefficient; deep-submicron FETs; device aging; device lifetimes; electron mobility; high performance CMOS; high-resolution TEM; hole mobility; junction leakage; multi-angle ellipsometry; oxide breakdown voltage; quantum effects; short channel effects; subthreshold slope; thin gate oxide; tunneling current; Aging; Boron; Circuit synthesis; Design engineering; Doping profiles; Ellipsometry; FETs; MOSFET circuits; Nitrogen; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1996. IEDM '96., International
Conference_Location :
San Francisco, CA, USA
ISSN :
0163-1918
Print_ISBN :
0-7803-3393-4
Type :
conf
DOI :
10.1109/IEDM.1996.553849
Filename :
553849
Link To Document :
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