DocumentCode :
3399035
Title :
A novel latch-up free SCR-LDMOS for power-rail ESD clamp in half-bridge driver IC
Author :
Si-Yang Liu ; Wei-Feng Sun ; Hong-Wei Pan ; Hao Wang ; Qin-Song Qian
Author_Institution :
Nat. ASIC Syst. Eng. Res. Center, Southeast Univ., Nanjing, China
fYear :
2012
fDate :
Oct. 29 2012-Nov. 1 2012
Firstpage :
1
Lastpage :
3
Abstract :
The SCR-LDMOS device is a promising Electro Static Discharge (ESD) protection structure in high-voltage ICs for its high ESD robustness. However, its low holding voltage makes it susceptible to ESD-induced latch-up failure, especially used in the power-rail clamp circuits. This work presents a novel SCR-LDMOS with the NIL layer to achieve 17V holding voltage and 5.1A second breakdown current in a 0.5μm SOI process. The device has been applied for 15V power-rail ESD clamp in half-bridge driver IC.
Keywords :
driver circuits; electrostatic discharge; elemental semiconductors; power integrated circuits; silicon; silicon-on-insulator; thyristors; ESD protection structure; ESD robustness; ESD-induced latch-up failure; NIL layer; SOI process; Si; current 5.1 A; electrostatic discharge protection structure; half-bridge driver IC; high-voltage IC; holding voltage; latch-up-free SCR-LDMOS; power-rail ESD clamp circuits; size 0.5 mum; voltage 15 V; voltage 17 V; Charge carrier processes; Clamps; Discharges (electric); Electrostatic discharges; Integrated circuits; Robustness; Thyristors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-1-4673-2474-8
Type :
conf
DOI :
10.1109/ICSICT.2012.6466723
Filename :
6466723
Link To Document :
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