DocumentCode :
3399113
Title :
Improving boundary element methods for parasitic extraction
Author :
Yan, Shu ; Liu, Jianguo ; Shi, Weiping
Author_Institution :
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
fYear :
2003
fDate :
21-24 Jan. 2003
Firstpage :
261
Lastpage :
267
Abstract :
We improve the accuracy and speed of boundary element method (BEM) or multipole accelerated BEM for interconnect parasitic extraction. Three techniques are presented and applied to capacitance extraction: selective coefficient enhancement, variable order multipole and multigrid. Experimental results show that the techniques are effective for extracting parasitics between all pairs of conductors, or between selected pairs of conductors.
Keywords :
boundary-elements methods; capacitance; circuit CAD; integrated circuit design; integrated circuit interconnections; boundary element methods; capacitance extraction; conductors; interconnect parasitic extraction; multigrid; multipole accelerated BEM; selected pairs; selective coefficient enhancement; variable order multipole; Acceleration; Boundary element methods; Capacitance; Conductors; Equations; Linear systems; Mathematics; Matrix decomposition; Singular value decomposition; Vectors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2003. Proceedings of the ASP-DAC 2003. Asia and South Pacific
Print_ISBN :
0-7803-7659-5
Type :
conf
DOI :
10.1109/ASPDAC.2003.1195027
Filename :
1195027
Link To Document :
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