DocumentCode :
3399258
Title :
Evaluation of multiple-output logic functions using decision diagrams
Author :
Iguchi, Yukihiro ; Sasao, Tsutomu ; Matsuura, Munehiro
Author_Institution :
Dept. of Comput. Sci., Meiji Univ., Japan
fYear :
2003
fDate :
21-24 Jan. 2003
Firstpage :
312
Lastpage :
315
Abstract :
This paper shows four different methods to evaluate multiple-output logic functions using decision diagrams: Shared BDD (SBDD), Multi-Terminal BDD (MTBDD), BDD for characteristic functions (CF), and BDDs for Encoded Characteristic Function for Non-zero outputs (ECFNs). Methods to compute average evaluation time for each type of decision diagrams are presented. By experimental analysis using benchmark functions, the number of nodes and average evaluation time are compared. Our results show that BDDs for ECFNs outperform MTBDDs, BDDs for CFs, and SBDDs with respect to both number of nodes and computation time. The sizes of BDDs for ECFNs are smaller than for MTBDDs, BDDs for CFs, and SBDDs.
Keywords :
binary decision diagrams; data structures; logic simulation; multivalued logic; ECFNs; Encoded Characteristic Function for Nonzero outputs; MTBDD; Multi-Terminal BDD; Shared BDD; average evaluation time; benchmark functions; characteristic functions; computation time; decision diagrams; multiple-output logic functions; Binary decision diagrams; Computer science; Data structures; Input variables; Length measurement; Logic functions; Microelectronics; Time measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2003. Proceedings of the ASP-DAC 2003. Asia and South Pacific
Print_ISBN :
0-7803-7659-5
Type :
conf
DOI :
10.1109/ASPDAC.2003.1195034
Filename :
1195034
Link To Document :
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