A still image encoder based on adaptive resolution vector quantization employing needless calculation elimination architecture

Author

Fujibayashi, M. ; Nozawa, T. ; Nakayama, T. ; Mochizuki, K. ; Kotani, K. ; Sugawa, S. ; Ohmi, T.

Author_Institution

Dept. of Electron., Tohoku Univ., Japan

fYear

2003

fDate

21-24 Jan. 2003

Firstpage

567

Lastpage

568

Abstract

We have developed an advanced vector quantization (VQ) encoding hardware for still image encoding systems. By utilizing needless calculation elimination methods, the computational cost of VQ encoding is reduced to 40% or less, while maintaining the accuracy of full-search VQ. We have successfully implemented the advanced encoding method and adaptive resolution VQ (AR-VQ), which realizes a compression ratio over 1/200 while maintaining image quality, into a still image encoding processor. The processor can compress a still image of 1600×2400 pixels within one second, which is 60 times faster than software implementation on current PCs.

Keywords

image coding; image resolution; integrated circuit design; logic design; vector quantisation; 1600 pixel; 2400 pixel; 3840000 pixel; AR-VQ; VQ encoding hardware; adaptive resolution vector quantization; compression ratio; computational cost reduction; full-search VQ accuracy; image processor; image quality; needless calculation elimination; still image encoder; still image encoding; Computational efficiency; Electronics industry; Encoding; Hardware; Image coding; Image quality; Image resolution; Industrial electronics; Pixel; Vector quantization;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2003. Proceedings of the ASP-DAC 2003. Asia and South Pacific

Print_ISBN

0-7803-7659-5

Type

conf

DOI

10.1109/ASPDAC.2003.1195081

Filename

1195081