FPGA Implementation of DSDV Based Router in Mobile Adhoc Network

A mobile ad-hoc network is the cooperative engagement of a collection of mobile nodes without the intervention of any centralized access point. It is a temporarily formed infrastructure-less network using mobile nodes like laptops, personal digital assistants and cellular phones. The nodes in the network not only become source or destination but sometimes help other nodes to communicate with each other by behaving like a router. The routing is done using many protocols after taking into account the higher mobility rate involved in the network. The popular protocols are DSDV, DSR, AODV and TORA. These protocols can be implemented in software or in hardware. Hardware can achieve a faster call setup and quick reaction to dynamic topology changes. In the fixed wired network, routers are viewed as hardware devices that are optimized for routing packets at high speeds. Trading off cost, flexibility, ease of configuration and speed will be a challenge for router design. Towards this aim in this paper, the destination sequenced distance vector (DSDV) routing protocol is implemented in hardware using VHDL and the architecture is simulated. This paper proposes MANET router hardware architecture for implementing the DSDV protocol