• DocumentCode
    3401018
  • Title

    Low power synthesis of finite state machines with mixed D and T flip-flops

  • Author

    Iranli, Ali ; Rezvani, Peyman ; Pedram, Massoud

  • Author_Institution
    Dept. of Electr. Eng. Syst., Univ. of Southern California, Los Angeles, CA, USA
  • fYear
    2003
  • fDate
    21-24 Jan. 2003
  • Firstpage
    803
  • Lastpage
    808
  • Abstract
    This paper presents a state assignment technique to reduce dynamic power consumption in finite state machines (FSM). The key idea is to decompose the state machine into a set of cycles that are collectively equivalent to the original FSM, and perform state assignment based on the cycle realization of the state machine using Gray codes. A new implementation of state machines by using a combination of D and T flip-flops is thereby proposed, which in conjunction with the proposed encoding algorithm, reduces power consumption by an average of 15%.
  • Keywords
    Gray codes; finite state machines; flip-flops; logic CAD; low-power electronics; state assignment; FSM; Gray codes; cycle realization; dynamic power consumption; encoding algorithm; finite state machines; low power synthesis; mixed D and T flip-flops; state assignment; state assignment technique; state machine decomposition; Automata; Circuit synthesis; Cost function; Counting circuits; Encoding; Energy consumption; Flip-flops; Hamming distance; Logic; Reflective binary codes;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2003. Proceedings of the ASP-DAC 2003. Asia and South Pacific
  • Print_ISBN
    0-7803-7659-5
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2003.1195128
  • Filename
    1195128