DocumentCode
3401213
Title
DRAFT: A dynamically reconfigurable processor for integer arithmetic
Author
Chiarulli, Donald M. ; Rudd, W.G. ; Buell, Duncan A.
Author_Institution
Department of Computer Science, Louisiana State University, Baton Rouge, Louisiana 70803
fYear
1985
fDate
4-6 June 1985
Firstpage
309
Lastpage
317
Abstract
A special computer for high-precision arithmetic features an ALU that is dynamically reconfigurable under program control. The 256-bit ALU consists of 8 32-Mt slices each of which has its own ALU operation code in each microinstruction. The slices can remain logically separated from each other, or he dynamically connected to either or both of their neighbors under control of a segment control code that is part of each microinstruction. The micro-assembly language designed for the machine includes special features to assist in the control of the segmentation, data addressing, and control sequencing. Estimations of the times required to execute arithmetic operations on the machine show that it will be exceptionally fast for problems in computational number theory and factoring of integers.
Keywords
Algorithms; Clocks; Hardware; Prototypes; Radiation detectors; Random access memory; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic (ARITH), 1985 IEEE 7th Symposium on
Conference_Location
Urbana, IL,
Type
conf
DOI
10.1109/ARITH.1985.6158935
Filename
6158935
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