DocumentCode
3401995
Title
Towards a unified framework for pre-silicon validation
Author
Kannavara, Raghudeep
Author_Institution
Intel Corp., Hillsboro, OR, USA
fYear
2013
fDate
10-12 July 2013
Firstpage
1
Lastpage
7
Abstract
One of the major problems seen in the pre-silicon validation realm today is the lack of a unified framework for all pre-silicon validation efforts including security validation. Lack of a unified framework for pre-silicon validation presents a “communication” challenge among different validation tool teams. While each team maintains and enhances a particular tool depending on the project they support and while these projects shift geographies to keep up with the product development life cycle, keeping the tools up to date, addressing specific tool changes and communicating the tool changes among project teams and dependent tool teams is emaciating. With this perspective, this paper seeks to highlight this issue and present a high-level solution space to address this problem. Further, the paper highlights outstanding issues that need to be resolved to enable such a unified pre-silicon validation framework to be successful.
Keywords
electronic design automation; formal verification; integrated circuit design; dependent tool teams; electronic design automation; high-level solution space; presilicon validation tool teams; product development life cycle; project teams; security validation; unified presilicon validation framework; Emulation; Formal verification; Hardware; Security; Silicon; Synchronization; Unified modeling language; computer aided design; electronic design automation; framework; pre-silicon validation; security validation; simulators;
fLanguage
English
Publisher
ieee
Conference_Titel
Information, Intelligence, Systems and Applications (IISA), 2013 Fourth International Conference on
Conference_Location
Piraeus
Print_ISBN
978-1-4799-0770-0
Type
conf
DOI
10.1109/IISA.2013.6623735
Filename
6623735
Link To Document